IMEC advances III-V chiplet integration on 300mm silicon, targeting denser 6G and AI infrastructure

Belgium-based IMEC said it has achieved a III-V chiplet integration breakthrough on 300mm silicon, enabling denser packaging of high-performance chips while moving passive components onto a silicon interposer. The lab said the approach is aimed at improving efficiency and lowering costs to help AI scale. The development aligns with NVIDIA CEO Jensen Huang’s view that future radio access networks will increasingly resemble “AI computers” as 6G arrives, while NVIDIA has also invested $1 billion in Nokia and assembled a coalition of telecom leaders working on AI-native platforms.